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NXP Semiconductors /LPC800 /GPIO_PORT /DIR0

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Interpret as DIR0

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0DIRP00RESERVED

Description

Direction registers port 0

Fields

DIRP0

Selects pin direction for pin P0_n (bit 0 = P0_0, bit 1 = P0_1, …, bit 17 = P0_17). 0 = input. 1 = output.
RESERVED

Reserved.

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data